1. Field of the Invention
The present invention relates to testing data transmission in and with digital circuits.
2. Discussion of the Background Art
High-speed IO (input/output) interfaces embedded into today's communication devices approach Terabit bandwidth. The architecture allowing this bandwidth boost is based on a parallel arrangement of serializer/deserializer cells running at data rates of several Gigabit per second and performing an independent serial data transmission on each lane in parallel (SerDes multilane interface). However, economic production testing of such interfaces imposes a significant challenge. Instrument based solutions are costly and slow and the test approach of using a simple loopback between transmit and receive portion of the SerDes does not cover faults resulting from data signals exposed to jitter and level noise.